Prior art logic state analyzers have had small to modest sized data acquisition memories that stored every data state occurring in the collection of digital signals being measured. Since the size of the trace is limited to the length of the memory, this reduces the extent of the trace, as well as including states that may be known in advance to be of no interest. For example, it may be necessary to find out how the contents of a certain memory location are getting "bombed". Write memory cycles to that address are definitely of interest, but perhaps little else. By establishing a qualification state criterion such as "write memory cycle while address equals 3456.sub.8 " only state data that is potentially of interest is stored in the data acquisition memory, thus magnifying the apparent size of that memory, while also sparing the user the task of sorting through utterly unrelated data in the trace.
This type of data storage qualification is accomplished in a Logic State Analyzer by allowing the user to define a plurality of qualification states, each possibly including don't-care symbols as part of their value, thus making such a qualification state a range. If more than one qualification state is defined, the plurality thereof is OR'ed to obtain the actual qualification state criterion. No state data is stored in the data acquisition memory unless it meets the qualification criterion. Storage qualification can also be termed a "selective trace", and is occasionally referred to as such herein.